1. Field of the Invention
The present invention relates to a packaging substrate structure with electronic components embedded therein and a method for fabricating the same and, more particularly, to a packaging substrate structure with electronic components embedded therein, which exhibits enhanced electrical performance and reliability, and a method for fabricating the same.
2. Description of Related Art
As the electronic industry develops rapidly, the technology of semiconductor packaging accordingly moves towards integration and miniaturization so that the demands such as multifunction and high efficiency in electronic devices can be met. In addition, packaging substrates with many active and passive components and circuit connections thereon have advanced from being single-layered boards to multiple-layered boards to expand the space for wiring layout in a limited packaging substrate and to meet the demand of the application of high-density integrated circuits.
With reference to FIG. 1, a flip chip ball grid array (FCBGA) substrate is optimally applied in semiconductor packaging. Herein, the active surface 11a of the chip 11 can be electrically connected to the surface 13a (for adhering a chip) of the packaging substrate 13 by a plurality of solder bumps 12. In addition, according to the design demand, the surface 13a (for adhering a chip) of the packaging substrate 13 can further electrically connect to at least one passive component 14, and a plurality of solder balls 15 can be disposed on the other surface of the packaging substrate 13 to function as I/O joints. The aforementioned structure has become mainstream technology for packaging chips and electronic components.
However, in a flip chip ball grid array package structure, the passive components 14 are disposed outside of the packaging substrate 13 by surface mount technology (SMT). Thereby, when a significant amount of passive components 14 are disposed on the surface of the packaging substrate 13 according to the design demand, it is necessary to increase the surface area of the packaging substrate 13 to dispose the increased passive components 14 thereon. Accordingly, the purpose of miniaturization cannot be achieved. In addition, the number of the passive components 14 is limited to the restricted area of the packaging substrate 13, and thereby the demands for high-density packaging have not been met.
Furthermore, the fact that passive components 14 are disposed on the surface of the packaging substrate 13 causes long transmission paths, large parasitic induction, poor electrical performance and thus the accuracy of signal transmission is badly influenced. Besides, the passive components 14 disposed on the surface of the packaging substrate 13 make the height of the package structure increase and thus the demand for a light and compact-sized product cannot be met.